Methods and apparatus for multi-processing execution of...

Details Methods and apparatus for multi-processing execution of... Methods and apparatus for multi-processing execution of...

2007-01-09

2007-01-09

Tsai, Henry W. H. (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S024000

Reexamination Certificate

active

10202355

ABSTRACT:
A multi-processing computer architecture and a method of operating the same are provided. The multi-processing architecture provides a main processor and multiple sub-processors cascaded together to efficiently execute loop operations. The main processor executes operations outside of a loop and controls the loop. The multiple sub-processors are operably interconnected, and are each assigned by the main processor to a given loop iteration. Each sub-processor is operable to receive one or more sub-instructions sequentially, operate on each sub-instruction and propagate the sub-instruction to a subsequent sub-processor.

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“Performance Evaluation Of Cascade ALU Architecture For Asynchronous Super-Scalar Processors”, Motokazu Ozawa, Masashi Imai, Yoichiro Ueno, Hiroshi Nakamura, Takashi Nanya, Published in the Proc. of ASYNC-2001, pp. 162-172, Mar. 2001.

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