Thin film transistor array panel and manufacturing method...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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Reexamination Certificate

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10915958

ABSTRACT:
A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.

REFERENCES:
patent: 6710372 (2004-03-01), Kim
patent: 6778232 (2004-08-01), Nakata et al.
patent: 2003/0197181 (2003-10-01), Yun
patent: 2004/0036073 (2004-02-01), Hong et al.
patent: 2005/0092999 (2005-05-01), Fujikawa et al.

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