Methods for preventing copper oxidation in a dual damascene...

Details Methods for preventing copper oxidation in a dual damascene... Methods for preventing copper oxidation in a dual damascene...

2007-03-06

2007-03-06

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S687000, C438S700000

Reexamination Certificate

active

11026984

ABSTRACT:
Methods of preventing oxidation of a copper interconnect of a semiconductor device are disclosed. An example method forms a lower copper interconnect on a substrate having at least one predetermined structure, deposits a nitride layer on the lower copper interconnect and on the substrate, and sequentially depositing a first insulating layer, an etch-stop layer, and a second insulating layer on the nitride layer. The example method also forms a trench and a via hole through the second insulating layer and the first insulating layer by using a dual damascene process, etches the nitride layer so as to expose some portion of the lower copper interconnect, and supplies combining gas onto the exposed portion of the lower copper interconnect.

REFERENCES:
patent: 6303498 (2001-10-01), Chen et al.
patent: 6323121 (2001-11-01), Liu et al.
patent: 6355571 (2002-03-01), Huang et al.
patent: 6372636 (2002-04-01), Chooi et al.
patent: 6607975 (2003-08-01), Agarwal
patent: 6703309 (2004-03-01), Chopra
patent: 2001/0051420 (2001-12-01), Besser et al.

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