Method and composition to minimize dishing

Details Method and composition to minimize dishing Method and composition to minimize dishing

2007-07-24

2007-07-24

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S692000, C438S693000

Reexamination Certificate

active

10867407

ABSTRACT:
Processes are disclosed for producing electronic interconnect devices, particularly semi-conductor wafers, with metal interconnect traces thereon wherein the surface of said device has improved planarity. Said planarity is achieved initially through the use of pulse reverse electrolytic plating techniques. Planarity is further enhanced by cathodically protecting the metal interconnect traces during the polishing operation. Cathodic protection is achieved by overtly applying a cathodic charge to said traces and/or by contacting said traces, during polishing, with a metal that is capable of sacrificial corrosion when in contact with the metal of the interconnect traces.

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