Semiconductor package with recess for die

Details Semiconductor package with recess for die Semiconductor package with recess for die

Filed on

2007-07-03

Date issued

2007-07-03

Examiner

Williams, Alexander Oscar (Department: 2826)

Patent Class

Active solid-state devices (e.g., transistors, solid-state diode

SubClass

Combined with electrical contact or lead

SubSubClass

Flip chip

Other Related Categories

C257SE21503, C257SE23004, C257SE23021, C257SE23024, C257SE23069, C257SE23125, C257SE25013, C257SE23172, C257SE23065, C257SE23177, C257SE23179, C257SE23064, C257SE23070, C257SE23190, C257S668000, C257S737000, C257S738000, C257S699000, C257S697000, C257S698000, C257S691000, C257S783000

Type

Reexamination Certificate

Status

active

Patent number

10718383

Description

ABSTRACT:
A semiconductor package is disclosed with a recess (51) for an integrated circuit die (52). The recess is made by bending or deforming all layers of a package substrate, and therefore the recess contains circuitry to connect to the integrated circuit die. The integrated circuit die is electrically connected to the package substrate by either wirebonds (53a), TAB or die solder balls (53b). The package substrate (50), a single sided printed wiring board, has a thick metal core (100) and one or more thin build up layers.

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