Methods and apparatus for implementing standby mode in a...

Details Methods and apparatus for implementing standby mode in a... Methods and apparatus for implementing standby mode in a...

2007-04-17

2007-04-17

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S194000, C365S229000

Reexamination Certificate

active

11116456

ABSTRACT:
A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device. The controller uses the self-refresh clock signal to delay transitions of the state control signal from the active state to the standby state relative to corresponding state changes of at least one external signal received by the memory device.

REFERENCES:
patent: 5423045 (1995-06-01), Kannan et al.
patent: 6313695 (2001-11-01), Ooishi et al.
patent: 2004/0073824 (2004-04-01), Machida
patent: 2005/0223245 (2005-10-01), Green et al.

Affiliated with

Also associated with

Rating

Methods and apparatus for implementing standby mode in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods and apparatus for implementing standby mode in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for implementing standby mode in a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3745038