Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-03-27
2007-03-27
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S156000, C711S205000, C711S206000
Reexamination Certificate
active
11199666
ABSTRACT:
Selected units of storage, such as segments of storage or regions of storage, may be invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure entries corresponding to the units of storage to be invalidated. Additionally, buffer entries associated with the invalidated units of storage or other chosen units of storage may be cleared. An instruction is provided to perform the invalidation and clearing. The instruction can be implemented by software emulation, hardware, firmware or some combination thereof.
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Heller Lisa C.
Pfeffer Erwin F.
Plambeck Kenneth E.
Slegel Timothy J.
Bragdon Reginald
Campbell John E.
Namazi Mehdi
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