Semiconductor device memory cell

Details Semiconductor device memory cell Semiconductor device memory cell

2007-07-24

2007-07-24

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S303000, C257S306000

Reexamination Certificate

active

11409094

ABSTRACT:
A circuit provides an inhibition to the short circuit between the bit line and the capacitance contact, without employing a self alignment contact (SAC) process. A hard mask is formed on the bit line upper surface and a side wall formed on the side surface of the bit line by etching back a nitride film. A bit contact interlayer film without the SAC structure is etched off except where bit line is formed. A direct nitride film is formed on the entire top and side surface of the bit line so as to cover the bit line in one processing step. Since the upper and side nitride film thicknesses are substantially the same, the height of the bit line can be reduced, enabling further miniaturization. In addition, since the sidewall nitride film is formed without an etch back process, it can more easily be formed with a constant film thickness.

REFERENCES:
patent: 6548845 (2003-04-01), Koike
patent: 6737694 (2004-05-01), Kim et al.
patent: 2002-231906 (2002-08-01), None
patent: 2003-7854 (2003-01-01), None

Affiliated with

Also associated with

Rating

Semiconductor device memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3741770