Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-25
2007-09-25
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
11097633
ABSTRACT:
Compiler flows are provided that can produce functionally equivalent field programmable gate arrays (“FPGAs”) and structured application-specific integrated circuits (“structured ASICs”). The flows may include feeding back design transformations that are performed during either flow so that a later performance of the other flow will necessarily include the same transformations, thereby helping to ensure functional equivalence. The flows may include a comparison of intermediate results in order to prove that functional equivalence is being achieved.
REFERENCES:
patent: 5043870 (1991-08-01), Ditzel et al.
patent: 5815405 (1998-09-01), Baxter
patent: 5825202 (1998-10-01), Tavana et al.
patent: 5874834 (1999-02-01), New
patent: 6091262 (2000-07-01), New
patent: 6094065 (2000-07-01), Tavana et al.
patent: 6195786 (2001-02-01), Raghunathan et al.
patent: 6209119 (2001-03-01), Fukui
patent: 6233599 (2001-05-01), Nation et al.
patent: 6242945 (2001-06-01), New
patent: 6490707 (2002-12-01), Baxter
patent: 6515509 (2003-02-01), Baxter
patent: 6526563 (2003-02-01), Baxter
patent: 6625787 (2003-09-01), Baxter et al.
patent: 6691286 (2004-02-01), McElvain et al.
patent: 7038490 (2006-05-01), Singh et al.
patent: 2004/0111691 (2004-06-01), Tan et al.
patent: 2004/0261052 (2004-12-01), Perry et al.
patent: 2005/0149896 (2005-07-01), Madurawe
patent: 2005/0280438 (2005-12-01), Park
“LCELL WYSIWYG Description for the Stratix II Family”, Version 1.1, Altera Corporation, Mar. 22, 2004.
A. Bismuth, “Bridge Between FPGAs and Standard-Cell ASICs; Structured ASICs Minimize Design Risks, Reduce Development Costs, and Shorten Time-To-Market,” Elektronik Weka-Fachzeitschriften Germany, vol. 54, No. 3, pp. 46-50, Feb. 8, 2005 (original German and English translation are provided herewith).
“Quartus II Software Release Notes” [Online], pp. 1-42, Jan. 2004.
Karchmer David
Schleicher, II James G.
Altera Corporation
Dinh Paul
Fish & Neave IP Group of Ropes & Gray LLP
Jackson Robert R.
Memula Suresh
LandOfFree
Methods for producing equivalent field-programmable gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods for producing equivalent field-programmable gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for producing equivalent field-programmable gate... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3740266