SRAM device with reduced leakage current

Details SRAM device with reduced leakage current SRAM device with reduced leakage current

2007-09-11

2007-09-11

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S189090

Reexamination Certificate

active

11353410

ABSTRACT:
The present invention discloses a memory device with a leakage current reduction feature. The memory device includes at least one memory cell for storing a value, and at least one switch module coupled to the memory cell for generating an operating voltage at various levels depending on various operation modes of the memory cell. The operating voltage is at a first level when the memory cell is being accessed, and is at a second level lower than the first level when the memory cell is not being accessed, thereby reducing a leakage current for the memory cell.

REFERENCES:
patent: 6560139 (2003-05-01), Ma et al.
patent: 6654277 (2003-11-01), Hsu et al.
patent: 6724648 (2004-04-01), Khellah et al.
patent: 6839299 (2005-01-01), Bhavnagarwala et al.
patent: 7055007 (2006-05-01), Flautner et al.
patent: 7061820 (2006-06-01), Deng

Affiliated with

Also associated with

Rating

SRAM device with reduced leakage current does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with SRAM device with reduced leakage current, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SRAM device with reduced leakage current will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3737852