Semiconductor memory device with cell transistors having...

Details Semiconductor memory device with cell transistors having... Semiconductor memory device with cell transistors having...

2007-09-04

2007-09-04

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S900000, C257SE27112, C257SE21431

Reexamination Certificate

active

11041250

ABSTRACT:
A semiconductor memory device includes: a semiconductor device base having an insulating substrate and a semiconductor layer overlying it; a cell array formed on the semiconductor device base with cell transistors disposed in such a manner that each of source and drain layers is shared by adjacent two cell transistors arranged in a direction, the cell transistor having an electrically floating channel body to store data defined by a carrier accumulation state of the channel body; and logic transistors formed on the semiconductor device base to constitute a peripheral circuit of said cell array, wherein at least a part of source and drain layers of each the cell transistor is formed with a thickness different from source and drain layers of the logic transistors.

REFERENCES:
patent: 6333222 (2001-12-01), Kitazawa et al.
patent: 6538916 (2003-03-01), Ohsawa
patent: 6617651 (2003-09-01), Ohsawa
patent: 6621725 (2003-09-01), Ohsawa
patent: 6771546 (2004-08-01), Ikehashi et al.
patent: 6825524 (2004-11-01), Ikehashi et al.
patent: 7023054 (2006-04-01), Ohsawa
patent: 7067881 (2006-06-01), Matsumoto et al.

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