Method for synchronizing processors in a multiprocessor system

Details Method for synchronizing processors in a multiprocessor system Method for synchronizing processors in a multiprocessor system

2007-03-13

2007-03-13

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C713S375000

Reexamination Certificate

active

10894064

ABSTRACT:
The high-speed barrier synchronization is completed among multiprocessors by saving overhead for parallel process without addition of a particular hardware mechanism. That is, the barrier synchronization process is performed by allocating the synchronization flag area, on the shared memory, indicating the synchronization point where the execution of each processor for completing the barrier synchronization is completed, updating the synchronization flag area with the software in accordance with the executing condition, and comparing, with each processor, the synchronization flag area of the other processors which takes part in the barrier synchronization.

REFERENCES:
patent: 9-305546 (1997-11-01), None
“Computer Organization & Design: The Hardware/Software Interface” by David A. Paterson et al. pp. 559-561, published by Nikkei BP, Apr. 1996.

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