Semiconductor device having two different operation modes...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S349000, C257SE29180, C257SE27112

Reexamination Certificate

active

11011911

ABSTRACT:
According to some embodiments, a semiconductor device includes a lower semiconductor substrate, an upper silicon pattern, and a MOS transistor. The MOS transistor includes a body region formed within the upper silicon pattern and source/drain regions separated by the body region. A buried insulating layer is interposed between the lower semiconductor substrate and the upper silicon pattern. A through plug penetrates the buried insulating layer and electrically connects the body region with the lower semiconductor substrate, the through plug positioned closer to one of the source/drain regions than the other source/drain region. At least some portion of the upper surface of the through plug is positioned outside a depletion layer when a source voltage is applied to the one of the source/drain regions, and the upper surface of the through plug is positioned inside the depletion layer when a drain voltage is applied to the one region.

REFERENCES:
patent: 6429091 (2002-08-01), Chen et al.
patent: 6448115 (2002-09-01), Bae
patent: 6635915 (2003-10-01), Kokubun
patent: 6870225 (2005-03-01), Bryant et al.
patent: 2002/0175378 (2002-11-01), Choe et al.
patent: 2004/0142534 (2004-07-01), Yoo et al.
patent: 2001-008504 (2001-02-01), None
S. Wolf et al., Silicon Processing for the VLSI Era, 2000, Lattice Press, Second Edition, vol. 1, p. 227.
English language abstract of Korean Publication No. 2001-008504.

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