Arbitration scheme for memory command selectors

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S154000, C710S005000, C710S006000, C710S240000, C710S244000

Reexamination Certificate

active

10988311

ABSTRACT:
An arbitration structure, a method, and a computer program are provided for an arbitration scheme that can handle a plurality of memory commands in an operating system. Typically, in a memory system there are three types of memory commands: periodic, read, and write. An arbitration scheme determines the order of priority in which these commands are executed. This arbitration scheme is flexible because it contains a read/write priority module, which can be programmed to execute any order of priority combination of read and write commands. This enables an arbitration scheme for any memory system to be easily programmed for maximum efficiency.

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patent: 2005/0105372 (2005-05-01), Kanda

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