Method and apparatus for relocating elements in a floorplan...

Details Method and apparatus for relocating elements in a floorplan... Method and apparatus for relocating elements in a floorplan...

2007-07-03

2007-07-03

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

11021841

ABSTRACT:
A method for modifying a compiled integrated circuit floorplan is provided. A non-optimally placed functional element within the floorplan is identified and then moved to a tray region outside of the integrated circuit floorplan. A location to move the non-optimally placed functional element is identified. In one embodiment, the location to move the non-optimally placed functional element is not viewable in the same display as the original location of the non-optimally placed functional element. The non-optimally placed functional element is then relocated from the tray region to a new location within the floorplan. The modified floorplan may be recompiled upon relocation of the functional element. A computer readable medium, a graphical user interface, and a system for designing an integrated circuit are also provided.

REFERENCES:
patent: 2003/0149962 (2003-08-01), Willis et al.

Affiliated with

Also associated with

Rating

Method and apparatus for relocating elements in a floorplan... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for relocating elements in a floorplan..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for relocating elements in a floorplan... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3726680