Flexibility of design of a bus interconnect block for a data...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing

Reexamination Certificate

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C710S060000, C710S052000

Reexamination Certificate

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07117277

ABSTRACT:
A method and design tool are provided for modifying a design of a bus interconnect block for a data processing apparatus in order to meet a requirement for a chosen characteristic of the bus interconnect block. The bus interconnect block provides a plurality of connections via which one or more master devices may access one or more slave devices, each connection comprising one or more paths, and each path having one or more path portions separated by storage elements. The method comprises the steps of: (a) selecting one or more candidate paths from said paths; (b) for each candidate path, applying predetermined criteria to determine whether modification of the number of storage elements in said path will assist in meeting the requirement for said chosen characteristic; and (c) modifying the number of storage elements in each candidate path for which it is determined at said step (b) that modification will assist in meeting the requirement for said chosen characteristic. Such an approach allows design modifications to be made iteratively with limited impact on previously made decisions, and allows design modifications to be considered and implemented on a connection-by-connection basis.

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ARM PrimeCell infrastructure AMBA 3 AXI Register Slice, Technical Overview, Copyright 2004.
AMBA AXI Protocol, Specification, v1.0, pp. 20-24, section 1-2 to 1-6, copyright 2003, 2004.

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