Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-08-29
2006-08-29
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S589000, C438S592000, C438S303000, C438S304000, C438S618000, C438S637000, C438S595000, C251S315040
Reexamination Certificate
active
07098124
ABSTRACT:
A method of forming contact holes is provided. A substrate having a plurality of device structures is provided. A first dielectric layer and a conductive layer sequentially cover the device structures and the surface of the substrate. A recess is formed in the conductive layer between every two neighboring device structures. A pair of composite spacers is formed in the recess. By using the composite spacers as a mask, a portion of the exposed conductive layer is removed to form a plurality of openings between every two neighboring device structures. A second dielectric layer is then formed on the sidewalls of the openings. A third dielectric layer is formed over the substrate. Portions of the third dielectric layer and the first dielectric layer above the openings are removed to form a plurality of self-aligned contact holes.
REFERENCES:
patent: 5744395 (1998-04-01), Shue et al.
patent: 5926709 (1999-07-01), Aisou et al.
patent: 6087710 (2000-07-01), Eimori et al.
patent: 6124192 (2000-09-01), Jeng et al.
Huang Min-San
Lai Leon
Wang Pin-Yao
Ahmadi Mohsen
Jianq Chyun IP Office
Lebentritt Michael
Powerchip Semiconductor Corp.
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