Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-08-08

2006-08-08

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S207000, C365S210130

Reexamination Certificate

active

07088629

ABSTRACT:
A semiconductor memory device includes memory cell arrays; bit lines; word lines; a column selection line; and a sense amplifier comprising a first sense node connected to the first bit line, a second sense node connected to the second bit line, a first cross couple including two switching elements of first conduction type connected in series between the first sense node and the second sense node, and a second cross couple including two switching elements of second conduction type connected in series between the first sense node and the second sense node, a first node between the two switching elements in the first cross couple and a second node between the two switching elements in the second cross couple being connected to different power supplies via a plurality of routes, the sense amplifier selecting the routes on the basis of a potential on the column selection line.

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patent: 6111778 (2000-08-01), MacDonald et al.
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S. Okhonin, et al., “Principles of Transient Charge Pumping on Partially Depleted SOI MOSFETs”, IEEE Electron Device Letters, vol. 23, No. 5, May 2002, pp. 279-281.
Takashi Ohsawa, et al., “Memory Design Using One-Transistor Gain Cell on SOI”, IEEE ISSCC, Session 9, Dram and Ferroelectric Memories, 9.1, 2002, (4 pgs.).
U.S. Appl. No. 10/882,354, filed Jul. 2, 2004, Ohsawa.
U.S. Appl. No. 10/901,237, filed Jul. 29, 2004, Ohsawa.

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