System and method to reduce noise in a substrate

Details System and method to reduce noise in a substrate System and method to reduce noise in a substrate

2006-02-07

2006-02-07

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S355000

Reexamination Certificate

active

06995431

ABSTRACT:
Certain embodiments of the invention may be found in, for example, a system that reduces noise in a substrate of a chip and may comprise a substrate and a first well disposed on top of the substrate. The first well may be a deep well. Notwithstanding, a second well and a third are both disposed within the first well and a first transistor may be disposed in the second well. A quiet voltage source may be connected to a body of the first transistor and a second transistor may be disposed in the third well. The first transistor may be a PMOS transistor and the second transistor may be an NMOS transistor. A noisy voltage source may be coupled to a source of the first transistor and a body of the first transistor may be resistively coupled to the second well.

REFERENCES:
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patent: 5994741 (1999-11-01), Koizumi et al.
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patent: 6395591 (2002-05-01), McCormack et al.
patent: 6403992 (2002-06-01), Wei
patent: 6724151 (2004-04-01), Yoo

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