Semiconductor arrangement with a MOS-transistor and a...

Details Semiconductor arrangement with a MOS-transistor and a... Semiconductor arrangement with a MOS-transistor and a...

2006-02-14

2006-02-14

Owens, Douglas W. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S471000

Reexamination Certificate

active

06998678

ABSTRACT:
The present invention relates to a semiconductor arrangement with a MOS transistor which has a gate electrode (40), arranged in a trench running in the vertical direction of a semiconductor body (100), and a Schottky diode which is connected in parallel with a drain-source path (D-S) and is formed by a Schottky contact between a source electrode and the semiconductor body.

REFERENCES:
patent: 4811065 (1989-03-01), Cogan
patent: 5693569 (1997-12-01), Ueno
patent: 6049108 (2000-04-01), Williams et al.
patent: 6118150 (2000-09-01), Takahashi
patent: 6133107 (2000-10-01), Menegoli
patent: 6351018 (2002-02-01), Sapp
patent: 6433396 (2002-08-01), Kinzer
patent: WO 00/51167 (2000-08-01), None
R.W. Erickson, “Fundamental of Power Electronics,” Univ. Colorado Press (2000) Chap. 4, 4.2, pp. 1-18.

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