Semiconductor memory having mode register access in burst mode

Static information storage and retrieval – Read/write circuit – Serial read/write

Reexamination Certificate

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C365S219000, C365S220000, C365S233100, C365S229000, C365S227000

Reexamination Certificate

active

07057959

ABSTRACT:
A method for controlling a semiconductor memory in which a mode register can be set in a burst mode. To set an operation mode in the burst mode, the semiconductor memory is changed first from the burst mode, through a power-down mode, to a standby mode of non-burst mode. Then the semiconductor memory is changed to a mode register set mode to set the mode register when commands are input in the same predetermined sequence that is used in the non-burst mode.

REFERENCES:
patent: 6314049 (2001-11-01), Roohparvar
patent: 6842391 (2005-01-01), Fujioka et al.
patent: 2000-011652 (2000-01-01), None
Patent Abstract of Japanese Publication No. 2000-011652, dated Jan. 14, 2000.

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