Multi-ported memory cell

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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Details

C365S154000, C365S156000

Reexamination Certificate

active

06999372

ABSTRACT:
A multi-port semiconductor memory device is provided with current limiting transistor devices interposed between the memory cell and the bit line transfer gates for multiple bit line pairs. Where each bit line pair represents a memory port that is connected to the memory cell during read and write operations, the current limiting transistor devices effectively reduce the current flow from non-writing bit lines, thereby improving memory writability. In addition, the current limiting transistor devices effectively reduce the current flow to non-reading bit lines, thereby improving memory stability.

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