Semiconductor device with a CMOS transistor

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S659000, C438S655000, C257S342000, C257S319000, C257S340000, C257S384000, C257S385000, C257S388000

Reexamination Certificate

active

07122470

ABSTRACT:
A semiconductor device having a gate electrode free from increasing of resistance of the gate electrode, from decreasing of capacitance of the insulation film due to depletion, and from penetrating of impurity. The semiconductor device includes a silicon layer, a gate insulating film formed on the silicon layer, a metal boron compound layer formed on the gate insulating film, and a gate electrode formed on the metal boron compound layer and containing at least silicon.

REFERENCES:
patent: 6417565 (2002-07-01), Komatsu
patent: 6503788 (2003-01-01), Yamamoto
patent: 6688584 (2004-02-01), Iyer et al.
patent: 2002/0048917 (2002-04-01), Sekine et al.
patent: 0115287 (1984-08-01), None
patent: 59-136973 (1984-08-01), None
patent: 8-222734 (1996-08-01), None
patent: 10-209441 (1998-08-01), None
patent: 11-135789 (1999-05-01), None
patent: 2001-176985 (2001-06-01), None
C. Hobbs, et al. “Sub-Quarter Micron CMOS Process for TiN-Gate MOSFETs with TiO2Gate Dielectric Formed by Titanium Oxidation” Symposium on VLSI Technology Digest of Technical Papers, 1999, pp. 133-134.

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