Cache structure and methodology

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S144000, C711S145000, C711S003000, C365S049130

Reexamination Certificate

active

07143239

ABSTRACT:
A cache structure comprising a plurality of tag arrays and a plurality of data arrays, the tag arrays each configured to point to lines of data in multiple ones of the plurality of data arrays, wherein multiple tag arrays are searched in parallel for data that may be contained in the data arrays.

REFERENCES:
patent: 5603004 (1997-02-01), Kurpanek et al.
patent: 5822755 (1998-10-01), Shippy
patent: 6237064 (2001-05-01), Kumar et al.
patent: 6272597 (2001-08-01), Fu et al.
patent: 6427188 (2002-07-01), Lyon et al.
patent: 6532521 (2003-03-01), Arimilli et al.
patent: 6591341 (2003-07-01), Sharma
patent: 2003/0131184 (2003-07-01), Kever

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