Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-11-28
2006-11-28
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S145000, C711S003000, C365S049130
Reexamination Certificate
active
07143239
ABSTRACT:
A cache structure comprising a plurality of tag arrays and a plurality of data arrays, the tag arrays each configured to point to lines of data in multiple ones of the plurality of data arrays, wherein multiple tag arrays are searched in parallel for data that may be contained in the data arrays.
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Hewlett--Packard Development Company, L.P.
Peikari B. James
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