Non-volatile memory device having upper and lower trenches...

Details Non-volatile memory device having upper and lower trenches... Non-volatile memory device having upper and lower trenches...

2006-06-20

2006-06-20

Chen, Jack (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000, C438S259000

Reexamination Certificate

active

07064381

ABSTRACT:
Non-volatile memory device, and method for fabricating the same are disclosed. By forming floating gate trenches in memory regions and filling the trenches with floating gate material, a step height of a with the floating gate/ONO/control gate structure is reduced to the level of a gate in a logic block, and the upper gate structures do not cause a topology imbalance. By forming a tunnel insulating film in the floating gate trenches, edges of the floating gate are in contact with the tunnel insulating film and included in an effective charge area of the device. By reducing the step height of the nonvolatile memory device and including edges of the floating gate in the effective charge area, the completed device can effectively perform its regular operations, such as erasure, programming, and reading.

REFERENCES:
patent: 5429970 (1995-07-01), Hong
patent: 2002/0110984 (2002-08-01), Liou et al.
patent: 2005/0116279 (2005-06-01), Koh

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