Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-12-05
2006-12-05
Parker, Kenneth (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S297000, C257S298000, C257S300000, C257SE27098
Reexamination Certificate
active
07145194
ABSTRACT:
In order to improve the soft error resistance of a memory cell of an SRAM without increasing its chip size, in deep through-holes formed by perforating a silicon oxide film, there is a silicon nitride film and a silicon oxide film, a capacitor element having a TiN film serving as a lower electrode, a silicon nitride film serving as an insulator and a TiN film as an upper electrode. This capacitor element is connected between a storage node and a supply voltage line, between a storage node and a reference voltage line, or between storage nodes of the memory cell of the SRAM.
REFERENCES:
patent: 5100817 (1992-03-01), Cederbaum et al.
patent: 5198683 (1993-03-01), Sivan
patent: 5514615 (1996-05-01), Ema et al.
patent: 5627390 (1997-05-01), Maeda et al.
patent: 5670803 (1997-09-01), Beilstein, Jr. et al.
patent: 5780910 (1998-07-01), Hashimoto et al.
patent: 5994735 (1999-11-01), Maeda et al.
patent: 6307217 (2001-10-01), Ikeda et al.
patent: 6548885 (2003-04-01), Ikeda et al.
patent: 6569729 (2003-05-01), Wu et al.
patent: 6635937 (2003-10-01), Ootsuka et al.
patent: 6649456 (2003-11-01), Liaw
patent: 2004/0164360 (2004-08-01), Nishida et al.
patent: 1-265558 (1989-10-01), None
patent: 2-040951 (1990-02-01), None
patent: 6-104405 (1994-04-01), None
patent: 9-017965 (1997-01-01), None
patent: 9-036252 (1997-02-01), None
patent: 9-232447 (1997-09-01), None
patent: 11-026604 (1999-01-01), None
patent: 2001-028443 (2001-01-01), None
patent: WO 03/019633 (2002-06-01), None
patent: WO 02/061840 (2002-08-01), None
Shigeyoshi Watanable, et al., “A Novel Circuit Technology With Surrounding Gate Transistors (SGT's) For Ultra High Density DRAMS's”; IEEE Journal of Solid-State Circuits, vol. 30, No. 9, Sep. 1995, pp. 960-971.
Chakihara Hiraku
Nishida Akio
Toba Koichi
Antonelli, Terry Stout and Kraus, LLP.
Parker Kenneth
Renesas Technology Corp.
Warren Matthew E.
LandOfFree
Semiconductor integrated circuit device and a method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit device and a method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit device and a method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3690943