Interface for prototyping integrated systems

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S315000

Reexamination Certificate

active

07065601

ABSTRACT:
An interface is described which has at least one chip side port with a first plurality of pins for conveying fields of a packet and first and second circuit side ports each port having a set of pins with a lower number than the first set of pins in the chip side port. The interface is constructed so that interrupt signals from an off-chip circuit can be conveyed on-chip in a manner such that the interrupt signals are indistinguishable from interrupt signals received from on-chip modules connected to an on-chip communication path. The same principle is applicable to power-down signals.

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patent: 6199137 (2001-03-01), Aguilar et al.
patent: 6467010 (2002-10-01), Pontius et al.
patent: 2002/0032831 (2002-03-01), Saulsbury et al.
patent: 2004/0019827 (2004-01-01), Rohfleisch et al.
patent: 2004/0250164 (2004-12-01), Ahmad et al.
XILINX, The Programmable Logic Data Book, 1994, p. 2-36-2-37.

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