Integration flow to prevent delamination from copper

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S648000, C438S643000, C438S637000, C438S638000, C438S639000, C438S652000, C438S653000, C438S654000, C438S655000, C438S656000, C438S658000, C438S659000, C438S677000, C438S678000, C438S679000, C438S680000, C438S672000, C438S668000, C438S642000, C438S644000, C438S626000, C438S627000, C438S628000, C438S629000, C438S622000, C438S623000, C438S624000, C438S631000, C438S632000, C438S633000, C438S635000, C257SE21143

Reexamination Certificate

active

07144808

ABSTRACT:
The present invention provides, in one embodiment, method of forming a barrier layer 300 over a semiconductor substrate 110. The method comprises forming an opening 120 in an insulating layer 130 located over a substrate thereby uncovering an underlying copper layer 140. The method further comprises exposing the opening and the underlying copper layer to a plasma-free reducing atmosphere 200 in the presence of a thermal anneal. The also comprises depositing a barrier layer in the exposed opening and on the exposed underlying copper layer. Such methods and resulting conductive structures thereof may be advantageously used in methods to manufacture integrated circuits comprising copper interconnects.

REFERENCES:
patent: 6130156 (2000-10-01), Havemann et al.
patent: 6998343 (2006-02-01), Sun et al.

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