Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2006-02-14
2006-02-14
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S039000, C326S041000
Reexamination Certificate
active
06998872
ABSTRACT:
Lookup table (LUT) circuits can optionally be configured as two or more smaller LUTs having independent input signals. A LUT circuit includes a tristate buffer circuit coupled between first and second multiplexer stages. The data input of the tristate buffer circuit is provided as a first output signal from the LUT circuit. The output of the second multiplexer stage provides the second LUT output signal. The tristate buffer circuit can include a tristate buffer with a pullup and a pulldown on the output terminal. To configure the circuit as a single LUT, the buffer is enabled (tristate disabled), and both the pullup and pulldown are turned off. To configure the circuit as two separate LUTs, the buffer is tristated and either the pullup or the pulldown is enabled. Additional multiplexer stages and tristate buffer circuits can be included to enable the division of the circuit into larger numbers of LUTs.
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Ralf Krueger and Brent Przybus; WP209 (v1.0); “Virtex Variable-Input LUT Architecture”; Jan. 12, 2004; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-6.
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Chirania Manoj
Kondapalli Venu M.
Cartier Lois D.
Tran Anh Q.
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