Static RAM having a TFT with n-type source and drain regions...

Details Static RAM having a TFT with n-type source and drain regions... Static RAM having a TFT with n-type source and drain regions...

2006-02-21

2006-02-21

Abraham, Fetsum (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S059000, C257S310000

Reexamination Certificate

active

07002212

ABSTRACT:
To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon film10is provided with a p-type semiconductor region13in contact with a channel region14. The p-type semiconductor region13is electrically connected to nowhere except the channel region14. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region13. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.

REFERENCES:
patent: 4809056 (1989-02-01), Shirato et al.
patent: 5089870 (1992-02-01), Haond
patent: H1435 (1995-05-01), Cherne et al.
patent: 5712501 (1998-01-01), Davies et al.
patent: 5812231 (1998-09-01), Kochi et al.
patent: 5898204 (1999-04-01), Watanabe
patent: 5920093 (1999-07-01), Huang et al.
patent: 6166786 (2000-12-01), Ohkubo et al.

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