Turbo decoder control for use with a programmable...

Details Turbo decoder control for use with a programmable... Turbo decoder control for use with a programmable...

2006-10-24

2006-10-24

Baker, Stephen M. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S780000, C714S787000, C714S790000

Reexamination Certificate

active

07127656

ABSTRACT:
A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a pre-determined memory mapping. The systematic data samples are accessed in the order required by the MAP decoding algorithm such that interleaving and de-interleaving functions in the MAP decoding algorithm are performed in real-time, i.e., without delay. Such memory-mapping in combination with data handling functions (e.g., multiplexing and combinatorial logic) minimizes memory requirements for the turbo decoder and allows for use of programmable interleavers, variable block lengths, and multiple code rates.

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