Method for forming metal interconnection line in...

Details Method for forming metal interconnection line in... Method for forming metal interconnection line in...

2006-11-14

2006-11-14

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S637000, C438S640000

Reexamination Certificate

active

07135403

ABSTRACT:
Disclosed is a method for forming a metal interconnection line in a semiconductor device. The method includes the steps of: forming an inter-layer insulation layer on a substrate, the inter-layer insulation layer having at least one contact hole exposing a portion of the substrate; forming a barrier metal layer on a bottom of said at least one contact hole and an upper surface of the inter-layer insulation layer; forming an amorphous seed layer on said at least one contact hole; converting portions of the seed layer disposed on an upper part of said at least one contact hole into a metal deposition blocking layer; selectively forming at least one adhesion layer on the bottom and sidewalls of said at least one contact hole by using the seed layer; and selectively forming at least one plug inside of said at least one contact hole.

REFERENCES:
patent: 5470792 (1995-11-01), Yamada
patent: 6060385 (2000-05-01), Givens
patent: 6787468 (2004-09-01), Kim et al.
patent: 2002/0132472 (2002-09-01), Park
patent: 1999-17335 (1999-03-01), None
patent: 2001109959 (2001-12-01), None
patent: 2002-72996 (2002-09-01), None
patent: 200272996 (2002-09-01), None
Notice of Preliminary Rejection mailed on Dec. 7, 2005, issued by the Korean Patent Office in counterpart Korean Application No. 2003-73067 and English translation thereof.

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