Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-06-13
2006-06-13
Yoha, Connie C. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S233100, C365S189011, C365S189040
Reexamination Certificate
active
07061818
ABSTRACT:
The present invention discloses a memory, and a refresh method for memory, which performs a normal access and refresh one after another within one operation cycle of SRAM. The memory of the present invention comprises a refresh enable which directs execution of refresh, a row address counter that addresses a row address of memory cells to be refreshed, and an execution circuit which refreshes the memory cells of the addressed row address in response to the direction of execution of refresh.
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Sunaga Toshio
Watanabe Shinpei
LeStrange Michael J.
Yoha Connie C.
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