Caching of dynamic arrays

Details Caching of dynamic arrays Caching of dynamic arrays

2006-10-24

2006-10-24

Verbrugge, Kevin (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07127559

ABSTRACT:
Systems and methods are provided for caching dynamic arrays. According to one aspect, a cache memory device is provided for caching dynamic arrays or dynamic overlays. According to one embodiment, the device includes a plurality of memory cells and at least one register for storing access information to access at least one array stored in the plurality of memory cells. According to another aspect, an electronic system is provided that includes a main memory, a dynamic array cache memory device, a general cache memory device, and a processor. The dynamic array cache memory device is coupled to the main memory and adapted for caching array data. The general cache memory device is coupled to the main memory and is adapted for caching regular data. The processor is coupled to and adapted for communication with the main memory, the general cache memory device, and the dynamic array cache memory device.

REFERENCES:
patent: 4077058 (1978-02-01), Appell et al.
patent: 5184320 (1993-02-01), Dye
patent: 5249282 (1993-09-01), Segers
patent: 5297270 (1994-03-01), Olson et al.
patent: 5493666 (1996-02-01), Fitch
patent: 5526506 (1996-06-01), Hyatt
patent: 5537359 (1996-07-01), Toda
patent: 5586325 (1996-12-01), MacDonald et al.
patent: 5751996 (1998-05-01), Glew et al.
patent: 5761477 (1998-06-01), Wahbe et al.
patent: 5829026 (1998-10-01), Leung et al.
patent: 5898858 (1999-04-01), Gillespie
patent: 6014723 (2000-01-01), Tremblay et al.
patent: 6047363 (2000-04-01), Lewchuk
patent: 6138209 (2000-10-01), Krolak et al.
patent: 6145057 (2000-11-01), Arimilli et al.
patent: 6157981 (2000-12-01), Blaner et al.
patent: 6185673 (2001-02-01), Dewan
patent: 6199173 (2001-03-01), Johnson et al.
patent: 6219725 (2001-04-01), Diehl et al.
patent: 6240499 (2001-05-01), Spencer
patent: 6279152 (2001-08-01), Aoki et al.
patent: 6282583 (2001-08-01), Pincus et al.
patent: 6288923 (2001-09-01), Sakamoto
patent: 6665775 (2003-12-01), Maiyuran et al.
patent: 6665864 (2003-12-01), Kawahito et al.
patent: 6675253 (2004-01-01), Brinkmann, Jr. et al.
patent: 6721760 (2004-04-01), Ono et al.
patent: 6826669 (2004-11-01), Le et al.
patent: 2002/0069400 (2002-06-01), Miloushev et al.
patent: 2002/0123981 (2002-09-01), Baba et al.
patent: 2002/0144244 (2002-10-01), Krishnaiyer et al.
patent: 2002/0169935 (2002-11-01), Krick et al.
patent: 2003/0014607 (2003-01-01), Slavin et al.
patent: 2003/0196039 (2003-10-01), Chen
patent: 2004/0015923 (2004-01-01), Hemsing et al.
patent: 2004/0205697 (2004-10-01), Hylands et al.
Sarawagi, S. , et al., “Efficient Organization of Large Multidimensional Arrays”,IEEE, (1994),328-336.
Verdier, C. , et al., “Access and Alignment of Arrays for a Bidimensional Parallel Memory”,IEEE, (1994),364-356.
Weinhardt, M. , et al., “Memory Access Optimisation for Reconfigurable Systems”,IEE Proceedings—Computers and Digital Techniques, 148, (May 2001),105-112.
Sarawagi, S. , et al., “Efficient Organization of Large Multidimensional Arrays”,Proceedings of the 10th International Conference on Data Engineering, IEEE Press,(1994),328-336.
Verdier, C. , et al., “Access and Alignment of Arrays for a Bidimensional Parallel Memory”,Proceedings of the International Conference on Application Specific Array Processors, IEEE Press,(1994),346-356.
Kandemir, M., et al., “Improving Memory Energy Using Access Pattern Classification”,Proceedings, IEEE/ACM International Conference on Computer Aided Design, (Nov. 4-8, 2001), 201-206.
Park, J. W., “An Efficient Buffer Memory System for Subarray Access”,IEEE Transactions on Parallel and Distributed Systems, 12(3), (Mar. 2001), 316-335.
Sheth, V. R., et al., “Real Time Failure Analysis of Cu Interconnect Defectivity Through Bitmap Overlay Analysis”,IEEE/SEMI Advanced Semiconductor Manufacturing Conference, (Sep. 8-10, 1999), 8-13.

Affiliated with

Also associated with

Rating

Caching of dynamic arrays does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Caching of dynamic arrays, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Caching of dynamic arrays will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3671065