Semiconductor memory device having a gate electrode and a...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257S298000

Reexamination Certificate

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07064375

ABSTRACT:
A semiconductor memory device, including a first memory cell having a first gate electrode, a first diffusion layer, and a second diffusion layer; a first contact layer connected to the first diffusion layer of the first memory cell; a second contact layer connected to the first contact layer; a second memory cell having a second gate electrode, a third diffusion layer and a fourth diffusion layer, the second gate electrode of the second memory cell electrically connected to the first gate electrode of the first memory cell, the first and second memory cells arranged in a direction perpendicular to the first bit line; and a conductive layer commonly connected to the second diffusion layer of the first memory cell and the fourth diffusion layer of the second memory cell, a height of the conductive layer substantially being coplanar with a height of the first contact layer.

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H. Watanabe, et al. “Novel 0.44 μm2Ti-Salicide STI Cell Technology for High-Density NOR Flash Memories and High Performance Embedded Application,” IEDM 98-975.
U.S. Appl. No. 10/602,595, filed Jun. 25, 2003, Yonehama et al.
U.S. Appl. No. 10/927,324, filed Aug. 27, 2004, Sakagami.

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