Process for fabricating interconnect networks

Details Process for fabricating interconnect networks Process for fabricating interconnect networks

2006-06-20

2006-06-20

Thai, Luan (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S622000, C438S623000, C438S637000, C438S738000

Reexamination Certificate

active

07064061

ABSTRACT:
The process includes depositing a filling material in trenches formed in at least one layer of dielectric so as to fill open pores in the dielectric. The filling material is intended to prevent the subsequent diffusion of the interconnect metal and/or of a metal of a diffusion barrier, and may be non-porous. The filling material preferably has a low dielectric constant.

REFERENCES:
patent: 6180518 (2001-01-01), Layadi et al.
patent: 6291333 (2001-09-01), Lou
patent: 6333265 (2001-12-01), Dixit et al.
patent: 2001/0051420 (2001-12-01), Besser et al.

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