Method and system for controlling and monitoring an array of...

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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C713S340000

Reexamination Certificate

active

07000125

ABSTRACT:
A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.

REFERENCES:
patent: 3660672 (1972-05-01), Berger et al.
patent: 4194147 (1980-03-01), Payne et al.
patent: 4538073 (1985-08-01), Freige et al.
patent: 4538101 (1985-08-01), Shimpo et al.
patent: 4622627 (1986-11-01), Rodriguez et al.
patent: 5053920 (1991-10-01), Staffiere et al.
patent: 5073848 (1991-12-01), Steigerwald et al.
patent: 5377090 (1994-12-01), Steigerwald
patent: 5481140 (1996-01-01), Maruyama et al.
patent: 5892933 (1999-04-01), Voltz
patent: 5946495 (1999-08-01), Scholhamer et al.
patent: 5990669 (1999-11-01), Brown
patent: 6191566 (2001-02-01), Petricek et al.
patent: 6211579 (2001-04-01), Blair
patent: 6262900 (2001-07-01), Suntio
patent: 6385024 (2002-05-01), Olson
patent: 6421259 (2002-07-01), Brooks et al.
patent: 6429630 (2002-08-01), Pohlman et al.
patent: 2001/0033152 (2001-10-01), Pohlman et al.
patent: 2002/0073347 (2002-06-01), Zafarana et al.
patent: 2002/0105227 (2002-08-01), Nerone et al.
patent: 2003/0122429 (2003-07-01), Zhang et al.
patent: 2003/0142513 (2003-07-01), Vinciarelli
patent: 2003/0201761 (2003-10-01), Harris
patent: 2004/0027101 (2004-02-01), Vinciarelli
patent: 2004/0090219 (2004-05-01), Chapuis
patent: WO 02/50690 (2002-06-01), None
33702 Microprocessor Power Supply (3.0A), Analog Products MC33702 Fact Sheet; Motorola/Digital dna/Power Management Switching; pp. 1-4.
“Motorola Switch Mode Power Supply With Linear Regulatos And High Speed CAN Transceiver”, Motorola, Inc. 2002; digital dna; Analog Marketing; Rev. 2.5, Nov. 2002; 33394; Multi-Output Power Supply Semiconductor Technical Data.
“Power Management Solutions For Networking Applications”; Presented by Luc Darmon, Smart Networks Developer Forum 2003—Jun. 4-6 Euro-Disney Paris, France; Motorola digital dna; www.motorola.com/sndf; pp. 1-26.
Preliminary Information 1.5 A Switch-Mode Power Supply With Linear Regulator, 33701; Power Supply Integrated Circuit; Motorola Semiconductor Technical Data; Analog Marketing MC33701/S Rev, 1.0, May 2003; Motorola digital dna; pp. 1-24.
“The 12-C Bus Specification”, Version 2.1; Jan. 2000; document order No. 9398 393 40011; Philips Semiconductors; pp. 1-46.
“System Management Bus Specification”, Smart Battery System Specifications; Revision 1.1 Dec. 11, 1998; SBS Implementers Forum; Version 1.1; pp. 1-39.
“KEKB Power Supply Interface Controller Module” by A. Akiyama, T. Nakamura, M. Yoshida, T. Kubo, N. Yamamoto and T. Katoh, KEK, High Energy Accelerator Research Organization, 1-1 Ohio, Tsukuba 305, Japan.
“Magnet Power Supply Control System KEKB Accelerators” by T.T. Nakamura, A. Akiyama, T. Katoh, Ta. Kubo, N. Yamamoto, M. Yoshida, KEK, Tsukuba, Japan, International Conference On Accelerator And Large Experimental Physics Control Systems, 1999, Trieste, Italy, pp. 406-408.
“Electronics Produts” by Paul Birman and Sarkis Nercessian, Kepco, Inc. Flushing NY, vol. 37, No. 10, Electronic Products, Mar. 1995; The Engineer's Magazine of Product Technology; Power Supply Special; DSO Samples Single Shots at 10 Gsamples/s Speech Recognition On A Single Chip LCD Has Flat-Panel Benefits At CRT Cost Product Update: High-Performance OP A,PS; A Hearst Business Publication; pp. 1, 5, 33-34.

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