Memory device

Details Memory device Memory device

2006-06-13

2006-06-13

Tran, Michael T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S191000

Reexamination Certificate

active

07061819

ABSTRACT:
There is provided a memory device which has a refresh control circuit generating a refresh command internally; a refresh interrupt control circuit generating a refresh interrupt signal for accepting the refresh command for a predetermined period when a write command is inputted externally; a command decoder instructing, when a write command is inputted externally, a writing operation after a refresh command accepting period by the refresh interrupt signal finishes and after waiting a refreshing operation to finish if the refreshing operation is being performed; and a comparing circuit instructing a refreshing operation when the refresh command is generated during the refresh command accepting period by the refresh interrupt signal.

REFERENCES:
patent: 4317169 (1982-02-01), Panepinto et al.
patent: 6950363 (2005-09-01), Matsubara
patent: 2001118383 (2001-04-01), None

Affiliated with

Also associated with

Rating

Memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3658362