Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2006-11-28
2006-11-28
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S189040, C365S233500
Reexamination Certificate
active
07142463
ABSTRACT:
A register file method incorporating read-after-write blocking using detection cells provides improved read access times in high performance register files. One or more detection cells identical to the register file cells and located in the register file array are used to control the read operation in the register file by configuring the detection cells to either alternate value at each write or change to a particular value after a write and then detecting when the write has completed by detecting the state change of an active detection cell. The state change detection can be used to delay the leading edge of a read strobe or may be used in the access control logic to delay generation of a next read strobe. The register file thus provides a scalable design that does not have to be tuned for each application and that tracks over voltage and clock skew variation.
REFERENCES:
patent: 5572467 (1996-11-01), Ghassemi et al.
patent: 6463002 (2002-10-01), Kim et al.
Chu Sam Gat-Shang
Klim Peter Juergen
Lee Michael Ju Hyeok
Paredes Jose Angel
Elms Richard
Harris Andrew M.
International Business Machines - Corporation
Mitch Harris Atty at Law, LLC
Nguyen Dang
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