Semiconductor memory device with a stacked gate including a...

Details Semiconductor memory device with a stacked gate including a... Semiconductor memory device with a stacked gate including a...

2006-10-17

2006-10-17

Flynn, Nathan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S391000, C257S315000, C257S317000, C257S510000, C257S501000, C257S506000, C257S365000

Reexamination Certificate

active

07122866

ABSTRACT:
A semiconductor memory device includes first and second MOS transistors. The first MOS transistor is formed on a region enclosed by a first element isolating region and includes a first gate insulating film and a first gate electrode. The second MOS transistor is formed on a region enclosed by a second element isolating region and includes a second gate insulating film and a second gate electrode. The upper part of the first and second element isolating regions project from a semiconductor substrate and their corners are curved. The width from the position where the first element isolating region contacts the first gate insulating film to the top surface end of the first element isolating region is equal to the width from the position where the second element isolating region contacts the second gate insulating film to the top surface end of the second element isolating region.

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W.-H. Liu et al.,“A 2-Transistor Source-select(2TS)Flash EEPROM for 1.8V-Only Applications,” Non-Volatile Semiconductor Memory Workshop 4.1, 1997, pp. 1-3.

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