Semiconductor device with reduced on-state resistance

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S401000, C257S408000

Reexamination Certificate

active

07087961

ABSTRACT:
To enable the reduction of ON-state resistance in a state in which the withstand voltage is secured, a semiconductor device according to the invention is provided with a gate electrode formed so that the gate electrode ranges from a gate oxide film formed on an N-type well region formed in a P-type semiconductor substrate to a selective oxide film, a P-type source region formed so that the source region is adjacent to the gate electrode, a P-type drain region formed in a position apart from the gate electrode and a P-type drift region (an LP layer) formed so that the drift region surrounds the drain region, and is characterized in that a P-type impurities layer (an FP layer) is formed so that the impurities layer is adjacent to the drain region.

REFERENCES:
patent: 4290077 (1981-09-01), Ronen
patent: 5229308 (1993-07-01), Vo et al.
patent: 5328859 (1994-07-01), Vo et al.
patent: 5932897 (1999-08-01), Kawaguchi et al.
patent: 6198131 (2001-03-01), Tung
patent: 6306711 (2001-10-01), Yang
patent: 60-198780 (1985-10-01), None
patent: S60-198780 (1985-10-01), None
patent: 5-343675 (1993-07-01), None
patent: H06-120497 (1994-04-01), None
patent: 7-283409 (1995-10-01), None
patent: H10-506755 (1998-06-01), None
Korean Office Action dated Sep. 26, 2002.

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