Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-08-01
2006-08-01
Pham, Hoai (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S303000, C257S306000
Reexamination Certificate
active
07084448
ABSTRACT:
A method used during the formation of a semiconductor device comprises providing a wafer substrate assembly comprising a plurality of digit line plug contact pads and capacitor storage cell contact pads which contact a semiconductor wafer. A dielectric layer is provided over the wafer substrate assembly and etched to expose the digit line plug contact pads, and a liner is provided in the opening. A portion of the digit line plug is formed, then the dielectric layer is etched again to expose the capacitor storage cell contact pads. A capacitor bottom plate is formed to contact the storage cell contact pads, then the dielectric layer is etched a third time using the liner and the bottom plate as an etch stop layer. A capacitor cell dielectric layer and capacitor top plate are formed which provide a double-sided container cell. An additional dielectric layer is formed, then the additional dielectric layer, cell top plate, and the cell dielectric are etched to expose the digit line plug portion. Finally, a second digit line plug portion is formed to contact the first plug portion. A novel structure resulting from the inventive method is also discussed.
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Related application entitled: “Reduced Aspect Ratio Digit Line Contact Process Flow Used During the Formation of a Semiconductor Device”, by Brent A. McClure, Micron Technology, Inc., U.S. Appl. No. 09/765,885, filed Jan. 16, 2001.
DeBoer Scott J.
Moore John T.
Weimer Ronald A.
Martin Kevin D.
Pham Hoai
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