Turbo decoder, turbo encoder and radio base station with...

Details Turbo decoder, turbo encoder and radio base station with... Turbo decoder, turbo encoder and radio base station with...

2006-08-29

2006-08-29

Chase, Shelly (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

07100104

ABSTRACT:
An error correction decoding unit performs error correction decoding of an inputted data series. A first memory is written with the data series subjected to error correction decoding by the error correction decoding unit. When the data series undergoing error correction decoding is written to the first memory, an address generator supplies write addresses and when the data series written to the first memory is read out of the first memory at random, the address generator supplies random read addresses.

REFERENCES:
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patent: 6845482 (2005-01-01), Yao et al.
patent: 6912684 (2005-06-01), Miyata et al.
patent: 2003/0148780 (2003-08-01), Takano
patent: 2001-53624 (2001-02-01), None
“cdma 2000 High Rate Packet Data Air Interface Specification”, pp. 9-43 to 9-44, 3GPP2, C.S0024 (Version 2.0), Oct. 27, 2000.

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