Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-11-07
2006-11-07
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07134098
ABSTRACT:
A digital system includes a plurality of hierarchically arranged design entity instantiations including a first entity instantiation containing second and third instantiations of the same design entity. Each of the instantiations contains a respective instance of a configurable entity having a plurality of possible configuration values that each corresponds to a different configuration of a functional portion of the digital system. A configuration specification for the digital system is received including a Dial containing a mapping between each of a plurality of possible Dial input values and a respective one of a plurality of configuration values. The configuration specification generically refers to the design entity. In response to receipt of the configuration specification, both instance of the configurable entity are automatically located. In response to the instances of the configurable entity, an association between the mapping and each of the instances of the configurable entity is automatically created.
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Roesner Wolfgang
Williams Derek Edward
Dillon & Yudell LLP
Dinh Paul
Salys Casimer K.
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