Semiconductor-on-insulator (SOI) strained active areas

Details Semiconductor-on-insulator (SOI) strained active areas Semiconductor-on-insulator (SOI) strained active areas

2006-10-24

2006-10-24

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C257SE21632, C257S351000

Reexamination Certificate

active

07125759

ABSTRACT:
Differentially strained active regions for forming strained channel semiconductor devices and a method of forming the same, the method including providing a semiconductor substrate comprising a lower semiconductor region, an insulator region overlying the lower semiconductor region and an upper semiconductor region overlying the insulator region; forming a doped area of the insulator region underlying a subsequently formed NMOS active region; patterning the upper semiconductor region to form the NMOS active region and a PMOS active region; carrying out a thermal oxidation process to produce a differential volume expansion in the PMOS active region with respect to the NMOS active region; forming recessed areas comprising the insulator region adjacent either side of the PMOS active region; and, removing layers overlying the upper semiconductor region to produce differentially strained regions comprising the PMOS and NMOS active regions.

REFERENCES:
patent: 6624476 (2003-09-01), Chan et al.
patent: 6764908 (2004-07-01), Kadosh et al.
patent: 7034362 (2006-04-01), Rim
patent: 2005/0064646 (2005-03-01), Chidambarrao et al.
patent: 2005/0269640 (2005-12-01), Shimamoto et al.

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