Self-aligned structure with unique erasing gate in split...

Details Self-aligned structure with unique erasing gate in split... Self-aligned structure with unique erasing gate in split...

2006-02-21

2006-02-21

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S320000

Reexamination Certificate

active

07002200

ABSTRACT:
A split-gate flash memory device. The device includes a floating gate, a control gate, and an erase gate. The floating gate is overlying a substrate. The control gate is laterally adjacent to the floating gate and overlying the substrate. The erase gate is laterally adjacent to the floating gate and overlying the control gate, in which the erase gate is between a sidewall spacer and the floating gate.

REFERENCES:
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patent: 6125060 (2000-09-01), Chang
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patent: 6274436 (2001-08-01), Kao et al.
patent: 6281545 (2001-08-01), Liang et al.
patent: 6476440 (2002-11-01), Shin
patent: 6638821 (2003-10-01), Hsieh
patent: 6747310 (2004-06-01), Fan et al.
patent: 6818512 (2004-11-01), Hsieh

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