Low AC power SRAM architecture

Details Low AC power SRAM architecture Low AC power SRAM architecture

2006-06-13

2006-06-13

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189080, C365S195000, C365S204000, C365S214000, C365S230030, C365S230060

Reexamination Certificate

active

07061792

ABSTRACT:
In a SRAM structure, power consumption is reduced by providing a structure which allows specific memory cells to be selected using word lines and column select lines, and reducing the load on the column address lines by dividing the load into sectors. The dividing into sectors is achieved by making use of sector select lines for selecting two or more rows of cells, and logically ANDing the sector select lines with the column select lines.

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