Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-10-17
2006-10-17
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S165000, C717S151000, C717S153000, C717S159000
Reexamination Certificate
active
07124276
ABSTRACT:
The present invention finds the optimum organization of compiled code within an application to ensure maximal cache efficiency. A configuration file specifies predefined cache, optimization, and application parameters. The cache parameters include a cache size, cache line size, set associativity, address-to-cache-line mapping algorithm, and set replacement algorithm. The optimization parameters specify the minimum acceptable efficiency level. The application parameters include a list of object modules and functions within those modules. All possible orderings of the modules are stepped through to determine where the specified functions fall within the cache given the location of the function within the module. The function locations in each permutation of the orderings are analyzed to find a solution that matches or beats the optimization parameters. In an embodiment, a front-end analysis program (“tool”) and a back-end processing stage, usually related to a linker, are provided. The tool reads the configuration file, analyzes the application, and recommends the optimal solution. In an embodiment, a development tool can be used instead of the front-end analysis tool. In another embodiment, a linker or a post-processing stage can be used to place the important functions adjacent to each other in cache.
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Pullen David Michael
Sieweke Michael Antony
Broadcom Corporation
Diller Jesse
Sparks Donald
Sterne Kessler Goldstein & Fox PLLC
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