Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S700000, C257S748000, C257S758000, C257S764000

Reexamination Certificate

active

07002201

ABSTRACT:
The present invention includes one wiring or a plurality of wirings and an MIM capacitor formed by capacity coupling of a lower electrode which is connected to an upper surface of the wiring(s) and an upper electrode. The lower electrode is comprised of a material preventive of diffusion of a material of the wiring(s), and it embraces the wiring(s).

REFERENCES:
patent: 6303958 (2001-10-01), Kanaya et al.
patent: 6313003 (2001-11-01), Chen
patent: 6344964 (2002-02-01), Adler
patent: 6492226 (2002-12-01), Hsue et al.
patent: 6498364 (2002-12-01), Downey et al.
patent: 6603165 (2003-08-01), Yamauchi et al.
patent: 6894331 (2005-05-01), Yoshitomi et al.
patent: 1303132 (2001-07-01), None
patent: 2001-267320 (2001-09-01), None
patent: 2002-9248 (2002-01-01), None
Kajita et al., U.S. Appl. No. 10/153,554 filed Apr. 22, 2002.
Patent Abstracts of Japan Publication No. 2001-203329 dated Jul. 27, 2001.
Patent Abstracts of Japan Publication No. 2001-036010 dated Feb. 9, 2001.

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