First-in first-out memory system with single bit collision...

Details First-in first-out memory system with single bit collision... First-in first-out memory system with single bit collision...

2006-02-07

2006-02-07

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

With shift register

C365S221000

Reexamination Certificate

active

06996015

ABSTRACT:
An electronic device (10). The device comprises a memory structure (12) structure comprising an integer M of word storage locations. The device further comprises a shift register (SRRD; SRWT) for storing a sequence of bits. The sequence in the shift register comprises a number of bits equal to a ratio of 1/R1times the integer M. The device further comprises circuitry (16) for providing a clock cycle to the shift register for selected data operations with respect to any of the word storage locations. The selected data operations are a data read or a data write. In response to each clock cycle, received from the circuitry for providing the clock cycle, the shift register shifts the sequence. Further, one bit in the sequence corresponds to an indication of one of the memory word storage locations from which a word will be read or into which a word will be written.

REFERENCES:
patent: 3997882 (1976-12-01), Goyal
patent: 4803657 (1989-02-01), Giebel et al.
patent: 5473756 (1995-12-01), Traylor
patent: 5768196 (1998-06-01), Bloker et al.

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